<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<HTML>
<HEAD>
<TITLE>80386 Programmer's Reference Manual -- Section 10.2</TITLE>
</HEAD>
<BODY STYLE="width:80ch">
<B>up:</B> <A HREF="c10.htm">
Chapter 10 -- Initialization</A><BR>
<B>prev:</B> <A HREF="s10_01.htm">10.1  Processor State After Reset</A><BR>
<B>next:</B> <A HREF="s10_03.htm">10.3  Switching to Protected Mode</A>
<P>
<HR>
<P>
<H1>10.2  Software Initialization for Real-Address Mode</H1>
In real-address mode a few structures must be initialized before a program
can take advantage of all the features available in this mode.
<P>
<H2>10.2.1  Stack</H2>
No instructions that use the stack can be used until the stack-segment
register (SS) has been loaded. SS must point to an area in RAM.
<P>
<H2>10.2.2  Interrupt Table</H2>
The initial state of the 80386 leaves interrupts disabled; however, the
processor will still attempt to access the interrupt table if an exception
or nonmaskable interrupt (NMI) occurs. Initialization software should take
one of the following actions:
<UL>
<LI> Change the limit value in the IDTR to zero. This will cause a shutdown
if an exception or nonmaskable interrupt occurs. (Refer to the 80386
Hardware Reference Manual to see how shutdown is signalled externally.)
<LI> Put pointers to valid interrupt handlers in all positions of the
interrupt table that might be used by exceptions or interrupts.
<LI> Change the IDTR to point to a valid interrupt table.
</UL>
<H2>10.2.3  First Instructions</H2>
After RESET, address lines A{31-20} are automatically asserted for
instruction fetches. This fact, together with the initial values of CS:IP,
causes instruction execution to begin at physical address FFFFFFF0H. Near
(intrasegment) forms of control transfer instructions may be used to pass
control to other addresses in the upper 64K bytes of the address space. The
first far (intersegment) 
<A HREF="JMP.htm">JMP</A> or 
<A HREF="CALL.htm">CALL</A> instruction causes A{31-20} to drop
low, and the 80386 continues executing instructions in the lower one
megabyte of physical memory. This automatic assertion of address lines
A{31-20} allows systems designers to use a ROM at the high end of
the address space to initialize the system.
<P>
<HR>
<P>
<B>up:</B> <A HREF="c10.htm">
Chapter 10 -- Initialization</A><BR>
<B>prev:</B> <A HREF="s10_01.htm">10.1  Processor State After Reset</A><BR>
<B>next:</B> <A HREF="s10_03.htm">10.3  Switching to Protected Mode</A>
</BODY>
